12.39 9 kW ZVS BTB prototype.Figure 12.40 Experimental waveforms with a three‐phase balanced load. (a) ia...Figure 12.41 Waveforms for ZVS operation of Si4 with a balanced 3 kW load at...Figure 12.42 Waveforms for ZVS operation of So2 with a balanced 3 kW load at...Figure 12.43 Waveforms for ZVS operation of S7 with a balanced 3 kW load at ...Figure 12.44 Waveforms for ZVS operation of So2 with a balanced 9 kW load at...Figure 12.45 Waveforms for ZVS operation of So2 with a balanced 9 kW load at...Figure 12.46 Waveforms for ZVS operation of S7 with a balanced 9 kW load at ...Figure 12.47 Waveforms of vcl and iLr under three‐phase unbalanced load.Figure 12.48 Waveforms for ZVS operation of Si4 with an unbalanced load at d...Figure 12.49 Waveforms for ZVS operation of So2 with an unbalanced load at d...Figure 12.50 Waveforms for ZVS operation of S7 with an unbalanced load at di...Figure 12.51 Generation of gate driving signals with short‐circuit signal.Figure 12.52 Waveforms of short‐circuit signal.Figure 12.53 Power device voltage stress at different power levels.Figure 12.54 Efficiency curve at different power levels.
13 AppendixFigure A.1.1 Trace of vector
with symmetrical three‐phase voltage.Figure A.1.2 Eight state combinations for three‐phase bridges in three‐phase...Figure A.1.3 Positions of eight basic vectors of three‐phase bridges.Figure A.1.4 Composition of reference voltage vector in sector 1.Figure A.2.1 Twelve switching patterns of SVM 12: (a) sector 1‐1, (b) sector...Figure A.3.1 Twelve switching patterns of ZVS‐SVM: (a) sector 1‐1, (b) secto...Figure A.4.1 Topology of hard‐switching three‐phase grid inverter.Figure A.4.2 Driving sequence of SVM 12 in sector 1‐1 within one switching p...Figure A.4.3 Conduction time of phase A’s main switches S1 and S4 in one lin...Figure A.4.4 Typical EE cores with dimensions.Figure A.4.5 Driving sequence of ZVS‐SVM in sector 1‐1 within one switching ...Figure A.4.6 Key waveforms in sector 1‐1.Figure A.5.1 Topology of soft‐switching three‐phase grid inverter.Figure A.5.2 Relationship between voltage vA0 and grid voltage va within 1/4...Figure A.5.3 Waveforms derivation of AC filter inductor current ripple with ...Figure A.5.4 ∆ia×L within the first 1/4 line cycle.Figure A.6.1 Definitions of DC‐side currents.Figure A.6.2 Waveforms of resonant inductor iLr and DC bus current idc in on...Figure A.6.3 Waveforms of ia, −ic, and DC input current Iin within sector 1‐...Figure A.6.4 Waveforms of time‐domain DC bus current idc, DC filter capacito...
12.39 9 kW ZVS BTB prototype.Figure 12.40 Experimental waveforms with a three‐phase balanced load. (a) ia...Figure 12.41 Waveforms for ZVS operation of Si4 with a balanced 3 kW load at...Figure 12.42 Waveforms for ZVS operation of So2 with a balanced 3 kW load at...Figure 12.43 Waveforms for ZVS operation of S7 with a balanced 3 kW load at ...Figure 12.44 Waveforms for ZVS operation of So2 with a balanced 9 kW load at...Figure 12.45 Waveforms for ZVS operation of So2 with a balanced 9 kW load at...Figure 12.46 Waveforms for ZVS operation of S7 with a balanced 9 kW load at ...Figure 12.47 Waveforms of vcl and iLr under three‐phase unbalanced load.Figure 12.48 Waveforms for ZVS operation of Si4 with an unbalanced load at d...Figure 12.49 Waveforms for ZVS operation of So2 with an unbalanced load at d...Figure 12.50 Waveforms for ZVS operation of S7 with an unbalanced load at di...Figure 12.51 Generation of gate driving signals with short‐circuit signal.Figure 12.52 Waveforms of short‐circuit signal.Figure 12.53 Power device voltage stress at different power levels.Figure 12.54 Efficiency curve at different power levels.
