18Table 18.1 Pulsation of DFIG parameters with DCC technique.Table 18.2 Harmonic distortion of iS and VGRID with DCC technique.Table 18.3 Load contribution by DFIG with DCC.Table 18.4 Load contribution by grid.13 Chapter 19Table 19.1 The voltage/current stresses of semiconductors.Table 19.2 Comparison table in terms gain, number of components and modes of the...Table 19.3 NSV and ANSV of the suggested converter and other converters.Table 19.4 Values of elements in simulation.
14 Chapter 20Table 20.1 Switching modes and charge/discharge states of capacitors in proposed...Table 20.2 Voltage Stress (VS) and Normalized Voltage Stress (NVS) of semiconduc...Table 20.3 Description of suggested first extended configuration.Table 20.4 Switching modes and charge/discharge states of capacitors for second ...Table 20.5 Voltage Stress (VS) and Normalized Voltage Stress (NVS) of semiconduc...Table 20.6 Information of second suggested extended configuration.Table 20.7 Longest Discharging Interval (LDI) of capacitors.Table 20.8 Parameter values used in efficiency and loss analysis.Table 20.9 Voltage Stress (VS) on semiconductors of suggested first basic config...Table 20.10 Voltage Stress (VS) on semiconductors of suggested 17-level basic co...Table 20.11 General comparison results.Table 20.12 Comparison results of the suggested configurations with 13-Level and...
List of Illustrations
1 Chapter 1Figure 1.1 The above schematic shows the sun-earth geometry portraying distance ...Figure 1.2 The above figure portrays different radiations occurring from the sun...Figure 1.3 Schematic to show atomic positions in diamond-type cubic lattice.Figure 1.4 Figure showing the doping of two types of foreign atoms of B (p-type)...Figure 1.5 Two semiconductor blocks of p-type and n-type before the formation of...Figure 1.6 Space charge region formed in between the joining region of p-type an...Figure 1.7 Current-voltage (I-V) characteristics of a semiconductor p-n junction...Figure 1.8 The two biasing regimes of a diode, (a) reverse (b) forward, are show...Figure 1.9 The above figure (a) displays band diagram of an abrupt junction in s...Figure 1.10 Approximation of foreign atom doping profiles in semiconductor formi...Figure 1.11 The schematic shows the electric field distribution and the width of...Figure 1.12 Schematic representations of barrier width and corresponding band en...Figure 1.13 Schematic shows an arbitrarily profile of dopants when reversed bias...Figure 1.14 Schematic shows diagrammatically the various steps involved in fabri...Figure 1.15 (a) Shows the schematic of (a) monofacial solar cell, (b) bifacial s...Figure 1.16 Fabrication steps involved in the preparation of a monofacial solar ...Figure 1.17 Shows the process flow for fabrication of solar cells to manufacture...Figure 1.18 Schematic shows the electrical contacting of n-type layers with curr...Figure 1.19 Schematic shows the electrical circuit of solar cell with current co...Figure 1.20 Schematic shows the electrical circuit of solar cell with current co...
2 Chapter 2Figure 2.1 A typical solar cell design [2].Figure 2.2 Efficiencies of the different substrate when deposited with CIGS [3].Figure 2.3 Efficiencies obtained for different solar materials for the device st...Figure 2.4 (a) The PCE record for Sb type solar cell of thin-film category. (b) ...Figure 2.5 Levels of energy for different materials used inperovskites solar cel...Figure 2.6 Efficiencies obtained with the passage of year for flexible and norma...
3 Chapter 3Figure 3.1 Types of perovskite solar cell architectures (a) Planer structure (b)...Figure 3.2 Charge transfer mechanism of (a) planner perovskite structure and (b)...Figure 3.3 Energy-level diagrams of a typical perovskite solar cell.Figure 3.4 Scalable manufacturing techniques for PSCs.Figure 3.5 Methods of spin coating (a) one-step deposition and (b) two-step depo...Figure 3.6 Photographic image of Roll to Roll manufacturing process [78].Figure 3.7 Slot-die coating method.Figure 3.8 Screen printing method.Figure 3.9 Inkjet printing (a) continuous (b) drop-on-demand.Figure 3.10 Doctor blade coating.
4 Chapter 4Figure 4.1 Single-diode model.Figure 4.2 Double-diode model.Figure 4.3 Three-diode model.Figure 4.4 Convergence curve for SDM (STM6 40-36 model).Figure 4.5 Convergence plot for DDM (JP270M60 model).Figure 4.6 Convergence characteristics for TDM (STP6 120-36 model).
5 Chapter 5Figure 5.1 Global cumulative PV power capacity (GW) from 2008 to 2018.Figure 5.2 Power and control circuit of the PV generation system.Figure 5.3 In a large PV system develops the PV cell to the panel.Figure 5.4 A PV cell physical electron-hole structure [19].Figure 5.5 Two PV array forming bipolar consisting of two monopolies PV array.Figure 5.6 Bypass and blocking diodes based a PV circuit.Figure 5.7 Electrical power SDPVC circuit (a) real-time model, (b) and (c) two s...Figure 5.8 The circuit diagram of the DDPVC.Figure 5.9 PV system based central, string, multistring, and ac-module configura...Figure 5.10 I-V and P-V curve for a PV based the MPP.Figure 5.11 P-V curves, various operating conditions.Figure 5.12 The power circuit structure of a PV scheme incorporating MPPT and ad...Figure 5.13 Hill-climbing P&O-MPPT scheme flow diagram [12].Figure 5.14 Flowchart of InC.-MPPT scheme [12].Figure 5.15 Stand-alone PV system, multilevel inverter output (a) voltage and cu...
6 Chapter 6Figure 6.1 Comparison of Energy Density of Lithium Cells and Other Types of Cell...Figure 6.2 Battery Management System (BMS) Block Diagram.Figure 6.3 The Suggested System Block Diagram.Figure 6.4 The Employed Battery Equivalent Circuit Model [24].Figure 6.5 The VL30P Cell Charge/Discharge Current Acquired with a 5-Bit Resolut...Figure 6.6 The SoC-OCV Reference Relation.Figure 6.7 The VL30P Cell Voltage Acquired with a 2.8-Bit Resolution Non-uniform...Figure 6.8 The Li-Ion Cell SoH Curve Respectively Estimated by the Reference Est...
7 Chapter 7Figure 7.1 Types of PQ Disturbances.Figure 7.2 Sources of PQ Disturbances [19].Figure 7.3 Facilities
