Fundamentals of Terahertz Devices and Applications. Группа авторов

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hole effect...Figure 8.14 DC voltage response to the THz voltage of the 0.01 V amplitude a...

      8 Chapter 9Figure 9.1 State‐of‐the‐art of frequency multiplier sources at room temperat...Figure 9.2 Frequency multiplier vs comb‐generator.Figure 9.3 Frequency multiplier ideal matching network and optimization.Figure 9.4 JPL 400 GHz four‐anode doubler with substrate‐less technology (de...Figure 9.5 LERMA‐C2N demonstration model of the 600 GHz two‐anode balanced d...Figure 9.6 Currents and electrical fields in the vicinity of the diodes of a...Figure 9.7 Schematics of a sub‐millimeter wave frequency tripler using an an...Figure 9.8 Picture of a four‐anode 900 GHz balanced tripler (designed by A. ...Figure 9.9 Detail of the diode area of a the balanced 1.5 THz tripler with a...Figure 9.10 Currents and electrical fields in the vicinity of the diodes of ...Figure 9.11 DC capacitance Vs voltage (a) and DC resistance Vs. Voltage (b) ...Figure 9.12 GaAs electron mobility and resistivity as a function of the elec...Figure 9.13 Theoretical DC breakdown voltage as a function of the epilayer d...Figure 9.14 GaAs electron mobility as a function of the ambient temperature ...Figure 9.15 Variation of the space charge region for different frequencies o...Figure 9.16 Charge density within the epilayer for different operation condi...Figure 9.17 (a) Definition of the HFSS wave‐port at the exact location of th...Figure 9.18 Optimization of the diodes‐cell of a four‐anode frequency triple...Figure 9.19 JPL 1500 GHz doubler with JPL frame‐less membrane technology (de...Figure 9.20 JPL flight model of the 1.7–1.9 THz local oscillator chain for H...Figure 9.21 (a) Last stage frequency tripler used for the 1.6–1.7 and 1.7–1....Figure 9.22 (a) Detail of the diode area of the Herschel 1.9 THz frequency t...Figure 9.23 JPL 1.8–2.1 THz multiplier sources at room temperature measured ...Figure 9.24 SEM image of the 2.7 THz balanced frequency tripler chip mounted...Figure 9.25 State‐of‐the‐art of 2.5–2.7 THz solid‐state sources at room temp...Figure 9.26 Schematics of JPL 1.6 THz high power multiplier chain and test s...Figure 9.27 Picture of JPL 1.6 THz high power multiplier chain.Figure 9.28 Picture of JPL 1.6 THz frequency tripler. This Frequency tripler...Figure 9.29 Performance of JPL 1.6 THz frequency tripler. RF performance in ...Figure 9.30 Close‐up vertical view of the power‐combined 260–340 GHz frequen...Figure 9.31 Quad‐chip 260–340 GHz tripler designed by John Ward at Jet Propu...Figure 9.32 Picture of the bottom half of the power‐combined 900 GHz frequen...Figure 9.33 Schematics of an in‐phase power‐combined balanced frequency doub...Figure 9.34 Detail of the demonstration model of the 300 GHz frequency doubl...Figure 9.35 Photograph of a dual‐symmetry 190 GHz balanced frequency doubler...Figure 9.36 Dual symmetry 190 GHz balanced frequency doubler using UMS Schot...Figure 9.37 Dual symmetry 190 GHz balanced frequency doubler using UMS Schot...Figure 9.38 Detail of JPL on‐chip in‐phase power combined 490–560 GHz freque...Figure 9.39 Performance of JPL 490–560 GHz frequency tripler. Two PAs module...Figure 9.40 Detail of JPL on‐chip in‐phase power combined 550 GHz single inp...Figure 9.41 Schematics of JPL on‐chip in‐phase power combined 550 GHz quad‐c...Figure 9.42 Photograph of JPL high power 165–195 GHz frequency doubler featu...Figure 9.43 Photograph of JPL high power 165–195 GHz module featuring four W...

      9 Chapter 10Figure 10.1 I–V and C–V characteristics of an ideal Schottky contact.Figure 10.2 Harmonic generation from nonlinear Q–V.Figure 10.3 The dependence of multiplication efficiency on f₀/f_c.Figure 10.4 C–V characteristics of a diode with φ = 0.85 V,

.Figure 10.5 Doubler input and output power using the diode characteristics i...Figure 10.6 The dependence of input power and efficiency on φ.Figure 10.7 The dependence of input power and efficiency on .Figure 10.8 Schematic for determining series resistance.Figure 10.9 Evaluated resistance of GaN diode versus diode anode size.Figure 10.10 Flowchart of semiconductor device numerical simulation.Figure 10.11 GaN low field mobility.Figure 10.12 GaN electron velocity.Figure 10.13 (a) Schematic of epi‐structure used in simulation (b) an exampl...Figure 10.14 Simulated ionization integral and electric field vs. bias volta...Figure 10.15 Simulated I–V characteristics.Figure 10.16 Series resistance extracted from forward IV curves in Figure 10...Figure 10.17 Simulated capacitance–voltage characteristics.Figure 10.18 Transient V(t),I(t) characteristics.Figure 10.19 Transient P(t) characteristics corresponds to Figure 10.18.Figure 10.20 Power and nonlinear performance of 300 nm thick N⁻ layer ...Figure 10.21 Power and nonlinear performance of 1 × 10¹⁷ cm⁻³ doped N⁻...Figure 10.22 Power and nonlinear performance of 1 × 10¹⁷ cm⁻³ doped 30...Figure 10.23 Power and nonlinear performance of 1 × 10¹⁷ cm⁻³ doped 30...Figure 10.24 SEM images of etched mesa by (a) Ar sputtering only in RIE and ...Figure 10.25 IV characteristics of Ni/GaN Schottky contact in forward region...Figure 10.26 Devices realized in this study.Figure 10.27 I–V characteristics of diodes with various diameter.Figure 10.28 Simulated current density contour of a diode.Figure 10.29 Cross section of GaN Schottky diode and the corresponding equiv...Figure 10.30 De‐embedding structures and the corresponding equivalent circui...Figure 10.31 Extracted C_{Y 12} from both as‐measured and de‐embedded Y‐paramet...Figure 10.32 Extracted C_{Y 12} versus bias voltage.Figure 10.33 Flow chart of EC modeling based on small‐signal S‐parameters.Figure 10.34 Extracted intrinsic parameters of diodes diameter from 2.5 to 1...Figure 10.35 Calculated cutoff frequency from extracted C_j and R_s.Figure 10.36 Simplified block schematic of sampler‐based LSNA.Figure 10.37 Configuration of measurement with 50 Ω.Figure 10.38 (a) Typical time‐domain waveform in I–V plot; (b) Q–V relation ...Figure 10.39 Derived instant Capacitance–Voltage relationship (solid lines),...Figure 10.40 Power handling capability for (a) 300 nm thick N⁻ layer (...Figure 10.41 Large‐signal diode model schematic for GaN Schottky diodes.Figure 10.42 P _out (dBm) versus P_absorbed (dBm). Symbols with solid lines:...Figure 10.43 Flow chart of large‐signal modeling for GaN Schottky diodes.Figure 10.44 Block diagram of a single diode frequency doubler.Figure 10.45 Schematic of large‐signal model of the 10 μm diode.Figure 10.46 S ₂₁ of the diode and with the presence of stubs.Figure 10.47 Schematic of circuit setup used for combining harmonic balance ...Figure 10.48 Simulated results of the 10 μm diode biased at −10 V, input pow...Figure 10.49 First (j₁) and third (j₃) harmonic amplitudes of the current os...Figure 10.50 Performance comparison between the state‐of‐the‐art measured ef...Figure 10.51 Current noise spectral density of single diodes in GaN‐ and GaA...Figure 10.52 (a) Forward I–V and fitting with TE in the low voltage range; (...

      10 Chapter 11Figure 11.1 Current status of semiconductor single sources in THz range; out...Figure 11.2 Operation principle of RTD. (a) Layer structure, (b) Fermi spher...Figure 11.3 Fundamental structure of RTD oscillator. (a) RTD with slot reson...Figure 11.4 Electron movement with delay time in RTD.Figure 11.5 Structure of RTD oscillators. (a) Structure of fabricated planar...Figure 11.6 Structure and I–V characteristics of RTD. (a) Layer struct...Figure 11.7 Schematic illustration of decrease of NDC with frequency indicat...Figure 11.8 Oscillation characteristics of RTD oscillators with different th...Figure 11.9 Schematic illustration of slot antenna and RTD with equivalent c...Figure 11.10 Oscillation characteristics of RTD oscillators with and without...Figure 11.11 Parasitic elements around RTD. (a) Parasitic elements with sche...Figure 11.12 (a) Offset slot antenna for high output power and (b) theoretic...Figure 11.13 Array configuration of RTD oscillators for high output power. (...Figure 11.14 Large‐scale array and output power. (a) Oscillator element of l...Figure 11.15 PLL system of an RTD THz oscillator. (a) Block diagram, (b) dow...Figure 11.16 Frequency‐tunable RTD oscillator integrated varactor diode. (a)...Figure 11.17 Array configuration of frequency‐tunable oscillators for wide t...Figure 11.18 Direct modulation of RTD oscillator. (a) Measurement setup and ...Figure 11.19 Wireless data transmission using direct modulation of RTD oscil...Figure 11.20 Wireless data transmission with frequency or polarization divis...Figure 11.21 Absorbance of allopurinol measured by frequency‐tunable RTD osc...Figure 11.22 N‐element antenna array. Each element is assumed to have its ow...

      11 Chapter 12Figure 12.1 Link budget (L_{dB}) and FSPL up to 1 THz

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