Microprocessor 4. Philippe Darche

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with a basic register with zero content base.

      1.2.3.2. Relative addressing

      Relative addressing, implied in PC (Program Counter-relative addressing), makes it possible to access a memory location relating to the current position of the program counter that, we recall, contains the address of the next instruction to be executed (Figure 1.12) after the decoding stage. This mode is in fact an indexed mode using the PC (cf. § 1.2.3.4 on indexing). With the following formula, we see that the effective address of the data or instruction relates to the PC by a value of d:

      [1.2]

      This is the favored mode for jump instructions, whether conditional or not (PC-relative branch). The relative displacement d is expressed in a signed integer representation, which is always the complement to 2n (two's complement, cf. § II.2.5 from Darche (2000)). Depending on the size of the displacement, the extent of the jump will be limited to (-2n-1, 2n-1 -1), with n being the format of the address field. Depending on the value of n of the relative address, we will call it a short or long jump. When the processor uses segmentation (this will be covered in a future book by the author on memories), jumps can be made within a single segment (intrasegment jump) or between two segments (extra-segment jump).

Schematic illustration of the execution of an instruction in relative addressing.

      Figure 1.12. Execution of an instruction in relative addressing

      73 F9 jnc loop; PC ← PC + F916

      Two particular cases should be cited: jmp 00, which jumps to the following instruction since the program counter has been incremented during the decoding phase of the execution cycle (cf. § V1-3.2 and V1-3.3.2) to direct the following instruction and jump –n, where n is the instruction format (in words) underway, which implements an infinite loop. This mode is linked to PC (PC with displacement or Program Counter with Displacement for MC68000). It can be seen as an indexed mode, the indexation register being the PC (cf. § 1.2.3.4).

      This mode is useful for generating the independent code of implantation in memory (position-independent code). We also speak of a translatable code (relocatable code), a topic discussed in § 3.1.4. It is also at the root of implantation of classic control structures of high-level languages (if_<condition>_then_else, iterative structures (i.e. loops) such as while_<condition>_do, repeat_until_<condition>, for_<condition>_do, etc.) in assembly language.

      This mode can even be used to address an operand (Figure 1.13). We cite x86 64-bit architectures with addressing called RIP (Instruction Pointer Register)- relative, ARMv8 with literal mode and MPU MC6809 with the program counterrelative mode.

Schematic illustration of seeking an operand in relative addressing.

      Figure 1.13. Seeking an operand in relative addressing

      This mode can be seen as an indirect mode auto-incrementation using the PC (Program Counter) as an indirection register (cf. § 1.2.3.3).

      1.2.3.3. Indirect addressing

      [1.3]

Schematic illustration of instruction with indirect register addressing.

      Figure 1.14. Instruction with indirect register addressing

      [1.4]

Schematic illustration of instruction with indirect memory addressing.

      Figure 1.15. Instruction with indirect memory addressing

      An auto-increment or auto-decrement can be suggested, which can be done before (prefix “pre”) or after (prefix “post”) the instruction using it is executed. It makes it possible to implement operators directly, such as ++ and -- in the language C. This means that after execution of this operator, the value of the pointer that contains the address of the object pointed to is incremented or decremented by a value equal to the size of the pointed element. But in the MPU, the increment or decrement value is fixed at programming in low-level language. More generally, auto-increment or auto-decrement makes it possible to manage a memory index, which is useful, for example, in displacement in a data structure such as an array. Register indirect addressing with post- or pre-increment/decrement is adapted for digital signal processing to address samples.

      This mode is in fact the one that makes it possible to implement absolute addressing mode using the PC (Program Counter) as an indirection register. It is for this reason that DEC (1983) with PDP series, which used the PC as a General-Purpose Register (GPR, cf. § V3-3.1), called it “PC absolute mode”, equivalent to an immediate indirect addressing (immediate8 deferred mode or auto-increment deferred mode). The term “immediate” means that the value immediately following the instruction code addressed by the PC will be used to fetch the address of the operand (EA = PC + 2 bytes in the case of the PDP-11 mini-computer) with, afterwards, an update to the PC. This same manufacturer proposed a relative

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