target="_blank" rel="nofollow" href="#ulink_27dc8a72-4980-5e91-841d-63044149fe16">Figure 2.17 Structure of a horizontal Yagi‐Uda antenna and coordin...Figure 2.18 Structure of a vertical Yagi‐Uda antenna and coordinat...Figure 2.19 Simulated and measured |S11| of a vertical...Figure 2.20 Simulated and measured radiation patterns of a vertical Yagi...Figure 2.21 Structure of a single‐polarized magneto‐electric...Figure 2.22 Photograph of a single‐polarized magneto‐electri...Figure 2.23 Structure of a dual‐polarized magneto‐electric d...Figure 2.24 Photograph of a dual‐polarized magneto‐electric ...Figure 2.25 Simulated and measured |S11| results for (a)...Figure 2.26 Simulated and measured radiation patterns of a single‐po...Figure 2.27 Simulated and measured radiation patterns of a dual‐pola...3 Chapter 3Figure 3.1 Lead frame.Figure 3.2 Laminate substrate: (a) cross‐section view of laminate substrate a...Figure 3.3 Simplified RDL process flow: (a) incoming wafer, (b) spin coat and...Figure 3.4 Wire bond versus flip chip die: (a) wire bond die and (b) flip chip...Figure 3.5 Wire bond plastic BGA package: (a) top and bottom view, (b) isometr...Figure 3.6 Assembly process flow for wire bond plastic BGA.Figure 3.7 Die preparation.Figure 3.8 Pick process flow: (a) piston (needle) ejector and (b) multi‐step e...Figure 3.9 Wire bond between die and laminate substrate.Figure 3.10 Two methods of molding: (a) transfer molding and (b) compression m...Figure 3.11 QFN package: (a) bottom view and (b) isometric view with mold com...Figure 3.12 QFN package cross‐section.Figure 3.13 QFN package assembly process flow.Figure 3.14 Flip chip BGA package cross‐section (from [38], © 2018 STATS Chip...Figure 3.15 Flip chip plastic BGA.Figure 3.16 Solder bumping process flow: (a) deposit UBM, (b) coatand pattern...Figure 3.17 Cu pillar bumping process flow: (a) deposit UBM, (b) coatand patt...Figure 3.18 Wafer level package: (a) bottom view and (b) cross‐section view (f...Figure 3.19 Cross‐section of solder ball on wafer level package.Figure 3.20 Wafer level package assembly process flow.Figure 3.21 Fan‐out wafer level package: (a) bottom view and (b) cross‐section...Figure 3.22 Key steps in FO‐WLP assembly process flow: (a) apply tape on temp...Figure 3.23 AMD Radeon™ Fury GPU: (a) optical microscope photography from top ...Figure 3.24 System overview of general system in package using HBM DRAM (from ...Figure 3.25 TSV cross‐section view (from [46], © 2016 IEEE, reprinted with per...Figure 3.26 Proposed 3D SSD with boost converter (from [47], © 2009 IEEE, repr...Figure 3.27 Cross‐section view of single chip InFO_PoP with TIV (Through InFO ...Figure 3.28 Sketch of 3D fan‐out stacking. Note that the vertical interconnect...Figure 3.29 Cross‐section view of six‐layer 3D fan‐out stacking package (from ...
4 Chapter 4Figure 4.1 Important parameters and considerations for AiP design and implemen...Figure 4.2 Illustration of the multilayered antenna package concept: (a) cross...Figure 4.3 Design and test flow example for implementing an AiP module.Figure 4.4 Illustration of signaling schemes on the 28‐GHz four‐chip antenna a...Figure 4.5 Thermomechanical and antenna prototype package with a top view of a...Figure 4.6 (a) Thermal shadow moiré setup illustration for warpage measurement...Figure 4.7 Thermal simulation and measurement for the 5G prototype package (fr...Figure 4.8 Illustration of the cross‐section view of the thermal experiment.Figure 4.9 Detailed views of heat spreader (left) and PCB cutout (middle) for ...Figure 4.10 Cooling configurations for low‐power AiP modules.Figure 4.11 A thermal resistance path.Figure 4.12 Cooling configurations for high‐power AiP modules.Figure 4.13 Server fan power and processor junction temperature variation with...Figure 4.14 Comparison between the conventional liquid‐cooled cold‐plate and d...Figure 4.15 Summary of cooling system technology improvement.
5 Chapter 5Figure 5.1 Spherical coordinate system with ....Figure 5.2 Illustration of the transition of a guided TEM wave along a transmi...Figure 5.3 Field regions around an antenna.Figure 5.4 Two‐dimensional normalized radiation pattern. A cut in the
6 Chapter 6Figure 6.1 An enlarged, 3D conceptual illustration of RF SoP to demonstrate th...Figure 6.2 Generalized LTCC fabrication process.Figure 6.3 3D view and slot geometry of the 79‐GHz SIW 12‐slot array antenna i...Figure 6.4 Top and side view of the 140‐GHz SIW horn antenna in LTCC [11].Figure 6.5 Cross‐section view of the 300‐GHz SIW horn antenna in LTCC [12].Figure 6.6 A 60‐GHz 4×4 antenna array with multilayered SIW‐based feeding ne...Figure 6.7 Multilayered 3D structure of the 38‐GHz LTCC quasi‐Yagi antenna [20...Figure 6.8 A 60‐GHz 4×6 LTCC‐based patch antenna array: (a) side view of the...Figure 6.9 Configuration of the 79‐GHz cavity resonator antenna array in LTCC ...Figure 6.10 A 94‐GHz microstrip mesh array antenna: (a) 3D exploded view and (...Figure 6.11 Radial line slotted antenna array in LTCC: (a) side view and (b) t...Figure 6.12 Measured and simulated radiation patterns at 276 GHz: (a) H‐plane ...Figure 6.13 A 60‐GHz active antenna in an LTCC package: (a) layer profile and ...Figure 6.14 Grid array antenna in LTCC: (a) top view and (b) bottom view [45].Figure 6.15 A 4×4 patch antenna array in LTCC with embedded cavity [53].Figure 6.16 Geometry of a 1×4 fractal antenna array with integrated Fresnel ...Figure 6.17 (a) Geometry of the via‐loaded strip soft surface structure and (b...Figure 6.18 Sievenpiper EBG embedded 60‐GHz 2×2 antenna array [60].Figure 6.19 Measured relative linear permeability of ESL 40012 [62].Figure 6.20 Cross sectional view of the tunable antenna module [63].Figure 6.21 Tunable antenna on a ferrite LTCC substrate with embedded windings...Figure 6.22 (a) Conceptual sketch of a monolithic slotted SIW phased antenna a...Figure 6.23 (a) Fabricated 2×3 antenna array prototype and (b) measured radi...Figure 6.24 Conceptual drawing of multi‐type LTCC tape system.
7 Chapter 7Figure 7.1 Example of (a) BGA package (STMicroelectronics ST25R3912‐AWLT) and ...Figure 7.2 Illustration of (a) wire bonding and (b) flip‐chip assembly of a BG...Figure 7.3 Standard core and prepreg symmetrical buildup.Figure 7.4 Four‐layer coreless buildup example.Figure 7.5 Organic substrate assembly process flow.Figure 7.6 Example of an organic strip comprising 64 BGA substrates before ass...Figure 7.7 AiP integration strategies: the die is on the opposite side of the ...Figure 7.8 Detailed top view of the patch, slot, and feeding microstrip line c...Figure 7.9 Cross‐section of the selected 1‐2‐1 HDI buildup to embed ACP antenn...Figure 7.10 Transparent top view of an ACP with the cavity where the patch is ...Figure 7.11 Simulated realized gain radiation patterns for (a) the E‐plane (φ ...Figure 7.12 60‐GHz HDI module with ACP antennas surrounded by buried vias.Figure 7.13 Pictures of the first manufactured HDI mmWave organic 60‐GHz modul...Figure 7.14 Measurement results: (a) reflection coefficient and (b) realized g...Figure 7.15 3D realized gain patterns at 60 GHz of the first realized module (...Figure 7.16 (a) Transparent top “large” view of the Rx antenna centered in a 1...Figure 7.17 Transparent top view of the complete BGA module (from [7]).Figure 7.18 Picture of the BGA module. (a) Bottom view with the chip footprint...Figure 7.19 (a)
