The primary spurious (or unintended) conversion occurs at the IF image of the desired RF signal. If the RF is above the LO (low‐side mixing), the image will be one IF below the LO (hi‐side mixing). Because mixers used as VNA receivers have lower noise floor and lower spurious responses, a much wider class of measurements that can be performed including noise figure, two‐tone IMD, and even some modulated measurements.
2.2.5.5 Phase Noise
The LO distribution attributes are critical in the performance of mixer‐based systems. The phase noise of the LO contributes directly to errors (primarily trace noise) in the phase of the measured signal. Even the trace noise of the amplitude response can be degraded by phase noise as the signal moves across the IF bandwidth filter. Providing a common and coherent LO to all the mixers improves the trace noise of the measurement by allowing the effects of LO phase noise to be reduced when the measured parameter is a ratio, such as gain or return loss.
2.2.5.6 Isolation and Crosstalk
Isolation between VNA receivers is important when measuring high‐dynamic‐range devices such as filters. In almost all measurements, the reference path has a large signal (as it measures the incident wave) and so is a constant source of leakage signals. Partly for this reason, it is common to provide additional loss in front of the reference channel mixer (5 or 10 dB) to lower the incident signal level and provide greater reverse isolation for mixer bounce. This also helps to keep the reference channel mixer operating in its linear region for higher source power signals, avoiding compression in the reference mixer.
In fact, there are four primary crosstalk paths in VNAs, listed here:
1 RF signal from the internal source or reference receiver to the transmission test port. This crosstalk signal is independent of the DUT characteristics, and its level remains constant regardless of the DUT properties but will change with test frequency. Leakage of the reference mixer IF to the test mixer IF path has similar characteristics, but its value doesn't change with frequency.
2 RF signal from the reflection test receiver (b1) that leaks to the transmission test receiver. This signal depends upon the input reflection of the DUT; if the DUT is well matched, there will be no signal at the reflection receiver. Since this signal depends upon the DUT, correcting for it is more complicated.
3 RF signal that leaks from the test set switch, to port 2, and reflects off the DUT output match into the port 2 transmission test mixer. As this signal depends upon the DUT characteristics, correcting for it can also be more complicated. Modern VNAs that use separate sources instead of test set switches eliminate this source of crosstalk.
4 The final source of signal leakage is related to any test fixture or probing done to connect to the DUT. Leakage from port 1 to port 2 of the probes or fixtures is usually electric field radiation or magnetic field coupling between the ports. Since these fields are non‐TEM, they do not remain constant with changes in the DUT characteristics, and their effect may not be well understood. Probe‐to‐probe isolation is a key problem in measurements, but one that is not well accounted for. Careful fixture or probe design that includes shielding is perhaps the best solution to this final leakage effect.
In most modern VNAs, the design of the mixers and LO isolation networks are such that the level of the first three sources of crosstalk are at or below the noise floor of the receiver. As such they can be ignored except in special cases where extended dynamic range is desired, as discussed in Chapter 6. The fourth cause of crosstalk is inherent in the fixtures or probes, and it can sometimes be removed with calibration. But since the source is often due to radiation from one port to the other, this radiation pattern depends in a complex way on the actual loading of the port and the structure of the DUT. For example, in a probed situation, leaving the probes up as an “open” calibration standard can cause the probes to act as E‐field antennas and can produce crosstalk between the probes. Grounding the probes, to produce a short, can cause magnetic field coupling between the probes, again producing crosstalk. Both of these crosstalk terms are non‐TEM, meaning they have E and H fields that propagate in the direction from port 1 to port 2. Normal calibration methodologies do not correct for non‐TEM crosstalk as their values do not remain constant if the DUT configuration changes.
2.2.6 IF and Data Processing
The final hardware portion of the VNA block diagram is the IF processing chain. The VNA receiver converts the RF signal to a first IF frequency, which is further converted and detected in the IF processing path. In older analyzers, such as the HP‐8510, this consisted of a synchronous analog second‐converter that produced two DC outputs proportional the real and imaginary portions of the RF voltage at the receiver input. These DC voltages were measured with DC analog‐to‐digital converters (ADCs) that produced a digital representation of the real and imaginary values. More modern IF structures such as in the HP‐8753 or HP‐8720 used a second stage of IF down‐conversion to bring the IF signal down to a frequency where an AC ADC could directly sample the waveform. The final IF frequency was set by the sampling rate of the ADC.
2.2.6.1 ADC Design
Now, most modern VNAs incorporate a high‐speed ADC and perform direct sampling of the first IF signal. An example of a VNA digital‐IF block diagram is shown in Figure 2.23. The IF signal is preconditioned with adjustable gain to optimize the signal‐to‐noise ratio in the ADC. For some applications, it is useful to have a narrowband pre‐filter before the ADC so that the IF can be switched between a wideband IF and a narrowband response. An anti‐alias filter is used just before the ADC, with a bandwidth of about one‐third to one‐fourth that of the ADC clock rate.
Figure 2.23 Digital IF block diagram.
The FPGA that processes the ADC readings can be configured as a digital second converter of flexible IF frequency, so the final digital IF frequency can be quite arbitrary. There are several modes of operation for the digital IF. For these high‐speed ADCs, the raw ADC readings have very high bit rates. Some of the latest designs for VNAs have four channels of data, at 16 bits and 100 mega‐samples per second to produce a data rate of 6.4 Gbps. Specialized conditioning of the signal and advanced digital signal processing (much of which is proprietary) can improve the performance of the IF ADCs to many more effective bits.
At these high data rates, the main CPU cannot process the data fast enough to keep up, so an FPGA is used to decimate and filter the signals before the processed data is sent to the main processor using shared DMA memory. The function of decimation and filtering is the basic data processing step of any digital IF; in this function, a measurement is performed by setting the source and receiver frequencies so that the first IF contains the signal of interest. The ADC samples the IF signal, typically with two to four times over sampling, although it can be as much as 60 or 100 times over sampled. A finite set of samples is processed by the FPGA to produce a final result that represents the real and imaginary parts of the signal being measured. For example, if the digital IF is operating at 100 Msps, the IF frequency is 10 MHz, and the IF filter is set to 100 kHz IF BW, then approximately 10 μs of data are captured, or approximately 1000 data samples. These 1000 samples are processed by a multiply‐add chain in the FPGA to both filter the response and extract the real and imaginary values. In this way, the 1000 samples are reduced to two samples.
A second mode of operation for the digital IF is “ADC capture”
