be matched, the deviation from matched conditions is due to some parasitic series or shunt element. Series elements show up in a Smith chart trajectory as following a contour of constant resistances. Shunt elements are not intuitively deduced from a Smith chart but can be deduced from an admittance chart (also called an inverse Smith chart), which follows the same conformal mapping of a Smith chart (impedance chart) but with the inverse of impedance (admittance) displayed as lines of constant conductance or susceptance.
For high‐frequency measurements, shunt capacitance or series inductance is almost always the parasitic values that must be dealt with. Note that the parasitic effect of a series capacitance or a shunt inductance actually diminishes with frequency, with the capacitor becoming a short, and the inductor an open, and these elements typically cause only low‐frequency degradation.
Figure 2.35 shows both an impedance plot (left) and admittance plot (right), each with two circuit elements: a 40 Ω load with a shunt capacitance (dark trace, left), and a 60 Ω load with a series inductance.
Figure 2.35 Impedance and admittance Smith charts.
Note that on the impedance chart, the highlighted marker values for the series inductive circuit display constant resistance and inductance, even as the frequency varies. The impedance plot of the shunt RC circuit (dark trace) does not show either constant resistance or constant capacitance. However, the same trace on the admittance chart (right) does show constant conductance and constant capacitance, where the series inductive LR circuit does not show constant value. From these charts, it is clear that the impedance chart allows determination of series elements easily as their trajectory follows constant resistance circles, and the admittance chart allows determination of shunt elements as their trajectory follows constant conductance circles.
In evaluating practical responses for input impedance, it is often the case the series or shunt element is at the end of some short, or long, transmission line that wraps the response around the Smith chart. In this case, for useful information to be discerned, it is necessary to remove excess delay from the measurement. However, it is sometimes difficult to know the exact delay that must be removed. In such a case, it is possible to use two marker readouts of the VNA to attempt to determine the value of a parasitic element by means of unwrapping the phase of the response until the underlying value is determined. Figure 2.36 shows a set of responses where the DUT characteristic is delayed by a short length of transmission line, as might be found in a printed circuit board (PCB) fixture or on‐wafer probe, followed by a series resistance and inductance (left, upper) or a shunt capacitance and conductance (right, upper). These are the two most common cases of parasitic characteristics.
Figure 2.36 Smith chart (right) and admittance chart (left) with wrapped phase (upper), unwrapped phase (middle), and overcompensated (lower); for an inductor (right) and a capacitor (left).
The trajectories are distorted by a frequency dependent phase shift due to the delay of a portion of transmission line between the VNA reference port and the parasitic. For the inductive case, the elements are series elements, and the normal Smith chart, or impedance chart, is shown. The marker readout gives the resistance, in Ω; the reactance, in Ω; and the equivalent inductance. It is clear that the apparent value of the reactive element is not constant. Most VNAs include the equivalent inductance or capacitance value associated with the reactance for the marker position and frequency.
For the capacitive example, since it is a shunt impedance, an inverse Smith chart or admittance chart is used. The value displayed for the real part of the admittance is the conductance, in milli‐Siemans (or mS, inverse Ω), and for the imaginary part is the susceptance, also in milli‐Siemans. The reactive part is converted to an equivalent shunt capacitance or inductance, determined by the sign of the imaginary part of the admittance. Again, it is clear that the apparent value of the shunt reactive element is not constant. In fact, both trajectories show an attribute of having a resonance, since they cross the real axis. However the fact that the magnitude of reflection is not a minimum at the crossing indicates that this is not a true resonant structure, but rather a device whose phase response is distorted by a length or delay of a transmission line between the measurement plane and the discrete impedance or admittance.
It is reasonably simple to investigate the effect of removing the delay, by using two markers, spaced in frequency. By reading the value of the imaginary element of each marker while adding in electrical delay, the phase shift of the delay line can be removed, and the resulting underlying element characteristics are revealed. When both marker readings show the same value for the reactive element, then the proper delay has been removed, as shown in the middle portion of Figure 2.36. In this case, the left plots give a capacitance of 1 pf in shunt with 100 Ω, and the right plots show an inductance of 3 nH in series with a resistance of 25 Ω.
The lower traces show the same measurement, but with even more electrical delay removed from the response. Electrical delay is a common scaling function in VNAs that provides a linear phase shift versus frequency for any particular trace. A related function is port extension, which also provides a phase shift but that shift is associated with the port of the analyzer, rather than with just the particular trace. With electrical delay scaling, only the trace that is active has the delay applied, and different traces of the same parameter can have different delays. With port extension, all traces that are associated with a particular port, for example, S11 and S21 with port 1, will have their phase response modified by the port extension. Electrical delay applies the same phase shift regardless of the parameter type, but port extensions properly account for a two‐times phase shift for reflection parameters in contrast with a one‐times phase shift for transmission parameters. Therefore, it is perhaps better to use port extension to accommodate changes in reference plane and reserve electrical delay for when one wants to remove the linear phase shift of a particular parameter.
The delay or port extension is adjusted until the trace rotation is minimized, while still maintaining a trajectory that follows a clockwise rotation. Foster demonstrated that all real devices should have phase that increases with frequency causing the clockwise rotation, so the proper amount of delay to be removed can often be determined by looking at the rotation direction of the trace trajectory. This is demonstrated in the lower traces of Figure 2.36, where an additional 10% of the delay from the middle traces has been removed, making the response overcompensated and causing a reactive element value at the two markers to be different.
2.4.1.2 Impedance Transformation
One aspect of rotation on the Smith chart that is often misunderstood is that the rotation around the center of the chart for a transmission line delay occurs only if the transmission line impedance matches the reference impedance of the Smith chart. Consider a case of a termination consisting of a 25 Ω resistor to ground, shunted by a 3 pF capacitor, and evaluated from DC to 10 GHz. The impedance trajectory is shown in the light trace in Figure 2.37, which shows a small deviation from 25 Ω due to the shunt capacitance.
