Circuit
7.5 Voltage Clipper
7.6 Half‐wave Voltage Doubler
7.7 Solar Cells Bypass Diodes
7.8 Applications of Schottky Diodes
7.9 Applications of Zener Diodes
7.10 Summary and Conclusions
Appendix 7.1 Calculation of the Current Through an RC Circuit
11 8 Transistors 8.1 The Concept of the Transistor 8.2 The Bipolar Junction Transistor 8.3 The Junction Field‐effect Transistor 8.4 The Metal Oxide Semiconductor FET 8.5 Summary and Conclusions Appendix 8.1 Punch Trough
12 9 Transistor Biasing Circuits 9.1 Introduction 9.2 Emitter Feedback Bias 9.3 Sinusoidal Operation of a Transistor with Emitter Bias 9.4 The Fixed Bias Circuit 9.5 The Collector Feedback Bias Circuit 9.6 Power Considerations 9.7 Multistage Transistor Amplifiers 9.8 Operational Amplifiers 9.9 The Ideal OpAmp 9.10 Summary and Conclusions Appendix 9.1 Derivation of the Stability of the Collector Feedback Circuit
13 10 Integrated Circuit Fabrication 10.1 The Basic Material 10.2 The Boule 10.3 Wafers and Epitaxial Growth 10.4 Photolithography 10.5 The Fabrication of a pnp Transistor on a Silicon Wafer 10.6 A Digression on Doping 10.7 Resume the Transistor Processing 10.8 Fabrication of Other Components 10.9 Testing and Packaging 10.10 Clean Rooms 10.11 Additional Thoughts About Processing 10.12 Summary and Conclusions Appendix 10.1 Miller Indices in the Diamond Structure
14 11 Logic Circuits 11.1 Boolean Algebra 11.2 Logic Symbols and Relay Circuits 11.3 The Electronics Inside the Symbols 11.4 The Inverter or NOT Circuit 11.5 The NOR Circuit 11.6 The NAND Circuit 11.7 The XNOR or Exclusive NOR 11.8 The Half Adder 11.9 The Full Adder 11.10 Adding More than Two Digital Numbers 11.11 The Subtractor 11.12 Digression: Flip‐flops, Latches, and Shifters 11.13 Multiplication and Division of Binary Numbers 11.14 Additional Comments: Speed and Power 11.15 Summary and Conclusions Appendix 11.1 Algebraic Formulation of Logic Modules Appendix 11.2 Detailed Analysis of the Full Adder Appendix 11.3 Complementary Numbers Appendix 11.4 Dividing Digital Numbers Appendix 11.5 The Author’s Symbolic Logic Machine Using Relays
15 12 VLSI Components 12.1 Multiplexers 12.2 Demultiplexers 12.3 Registers 12.4 Timing and Waveforms 12.5 Memories 12.6 Gate Arrays 12.7 Summary and Conclusions Appendix 12.1 A NAND implementation of a 2 to 1 MUX
