9.3 Emitter feedback bias circuit with the resistor values we need to...Figure 9.4 The load line that determines the output voltage–current relation...Figure 9.5 By adding a sinusoidal signal using capacitors we can modulate th...Figure 9.6 From a sinusoidal source point of view the capacitors and the bat...Figure 9.7 The AC equivalent circuit of a transistor consisting of an input ...Figure 9.8 We can superimpose the sinusoidal signals on the transistor chara...Figure 9.9 The fixed bias circuit is simpler than the collector feedback cir...Figure 9.10 The load line on the transistor characteristic curves for a fixe...Figure 9.11 The fixed bias circuit with the resistance values we have calcul...Figure 9.12 The collector feedback bias circuit is a different way of stabil...Figure 9.13 Stabilization diagram of the collector feedback circuit.Figure 9.14 By connecting two transistor circuits with appropriate capacitor...Figure 9.15 By adding a potentiometer and a bypass capacitor (both in red) t...Figure 9.16 The internal circuit of an OpAmp, the Fairchild 741.Figure 9.17 The symbol for an OpAmp with two supply voltages, one positive a...Figure 9.18 A differential input amplifier eliminates many of the noise prob...Figure 9.19 A current mirror ensures that the output current, IC2, is the sa...Figure 9.20 The ideal OpAmp has an infinite resistance, zero output resistan...Figure 9.21 An inverting OpAmp has a gain defined by the ratio of the two re...Figure 9.22 A differential amplifier provides a gain defined by the ratio of...Figure 9.23 The collector feedback bias circuit is a different way of stabil...10 Chapter 10Figure 10.1 Dr. Jan Czochralski developed a method of growing very pure and ...Figure 10.2 The Czochralski method to grow a silicon boule. A seed pulls the...Figure 10.3 In the float‐zone growth method a heating coil moves up and down...Figure 10.4 Dr. Robert Noyce, observing the photographic process in a darkro...Figure 10.5 Cross‐section of the planar transistor we want to build. The p‐t...Figure 10.6 Top view of the aluminum lines connecting the different silicon ...Figure 10.7 First four steps of transistor fabrication: the epitaxial layer ...Figure 10.8 The next step is to photographically illuminate the portion of t...Figure 10.9 The semiconductor after the illuminated part of the photoresist ...Figure 10.10 We remove the oxide with ammonium fluoride and the excess photo...Figure 10.11 The semiconductor, with the desired oxide removed, is located i...Figure 10.12 The impurity concertation at the end of the deposition (curve a...Figure 10.13 An ion implanter consists of an ion source, a magnet to separat...Figure 10.14 The impurity concentration in an implanted wafer as a function ...Figure 10.15 Using an ion implanter we fabricate the emitter region using a ...Figure 10.16 Mask used to create the p+ (left) and n+ (right) regions.Figure 10.17 A wafer covered with a metal layer makes contact with all the n...Figure 10.18 The aluminum mask connects each contact on the wafer to areas w...Figure 10.19 Modern electronic integrated circuits use multiple levels of in...Figure 10.20 Fabrication of a resistor. Cross‐section of an integrated resis...Figure 10.21 Another way to fabricate a resistor is to use the epitaxial lay...Figure 10.22 Capacitors are fabricated using the same techniques as MOSFETs ...Figure 10.23 Spiral inductors can also be fabricated in a spiral form, as a ...Figure 10.24 A fully processed wafer.Figure 10.25 A modern probe tester (left) and the very thin conductive probe...Figure 10.26 Single electronic device packaging with the three inputs for em...Figure 10.27 In a flat package the chip sits in the middle and is bonded to ...Figure 10.28 Packaging for devices with many inputs and outputs.Figure 10.29 A sketch of the flip bonding process (left) and a completed pac...Figure 10.30 The minimum design rules compared to typical impurities that ca...Figure 10.31 Effect on yield of defects as a function of chip size.Figure 10.32 A typical laminar flow clean room keeps the air flow vertically...Figure 10.33 Left, a stepper photolithography system (ASM Lithography Co.). ...Figure 10.34 1970 to 2016 progress in the transistor count per square inch....Figure 10.35 Three ways we can slice the diamond crystal structure.Figure 10.36 The flats in different locations around the periphery of the wa...
11 Chapter 11Figure 11.1 George Boole developed the symbolic logic language called Boolea...Figure 11.2 Symbols of normally OFF (left) and normally ON (right) relays.Figure 11.3 The logic circuit AND using two normally closed relays (top left...Figure 11.4 The logic circuit OR using relays (left), its truth table (middl...Figure 11.5 The logic circuit NOT using a relay (left), the truth table (mid...Figure 11.6 The XOR truth table (left) and its symbol (right). For the outpu...Figure 11.7 The seven logic symbols we use in designing digital electronic c...Figure 11.8 Diode implementation of the AND function (left), the truth table...Figure 11.9 Diode implementation of an OR function (right) with the truth ta...Figure 11.10 Symbols for the n‐ (left) and p‐ (right) MOSFETs. The p‐MOSFET ...Figure 11.11 The NOT circuit using CMOS with the truth table and its symbol....Figure 11.12 The two states of the OR circuit, with Vin OFF on the left and ...Figure 11.13 The NOR circuit (left), the truth table (top right), and the NO...Figure 11.14 The switching status of the four MOSFET circuits as the two inp...Figure 11.15 The NAND circuit (left) with the truth table (top right) and it...Figure 11.16 The CMOS switching status as the inputs go independently from 0...Figure 11.17 The logic function XNOR, its truth table, and its symbol.Figure 11.18 The half adder circuit (left), the truth table (right), and its...Figure 11.19 The full adder with the truth table and the new symbol can be c...Figure 11.20 Adding two three‐digit numbers. We use as many full adders as t...Figure 11.21 How elementary (left) and high school students (right) subtract...Figure 11.22 Step‐by‐step subtraction of two digital numbers.Figure 11.23 The half subtractor circuit (left), the truth table (top right)...Figure 11.24 Full subtractor (top left), its symbol (lower left), and the tr...Figure 11.25 Flip‐flop (left) and latch (middle) modules, their symbol, and ...Figure 11.26 A 3 × 3 shift register.Figure 11.27 Electrical path of Figure 11.26 when R2 is ON and all the other...Figure 11.28 The multiplication of two digital numbers is the same as in the...Figure 11.29 The output of a device driven by a perfect square input pulse (...Figure 11.30 The half adder module.Figure 11.31 The development of the truth table of the full adder.Figure 11.32 A full adder with the option to add or subtract the numbers dep...Figure 11.33 How we divide in the decimal (left) and the digital (right) sys...Figure 11.34 The author with a symbolic logic machine designed in 1962 using...
12 Chapter 12Figure 12.1 A MUX selects one of the many inputs, like a rotary switch. The ...Figure 12.2 A 2 to 1 MUX implementation using two ANDs, one NOT, and one OR ...Figure 12.3 Implementation of a 4 to 1 MUX, using ANDs and NOTs. The two con...Figure 12.4 An 8 to 1 MUX can be implemented by using smaller MUXs. Control ...Figure 12.5 A 1 to 4 DEMUX using AND and NOT modules with the symbol on the ...Figure 12.6 8 to 1 DEMUX constructed using smaller size DEMUXs.Figure 12.7 The register is composed of many latches with the non‐asterisk o...Figure 12.8 To transfer data from register 1 to register 2, we turn ON the s...Figure 12.9 We can transfer the data faster from one register to another by ...Figure 12.10 Many waveforms can be generated from the main system clock, the...Figure 12.11 As waveforms move across the electronic system, there are timin...Figure 12.12 The rise and fall times of pulses limit the speed of the electr...Figure 12.13 A typical memory unit cell consists of a flip‐flop in the cente...Figure 12.14 When the word line is 1, the CMOSs M1 and M4 are shorted, and t...Figure 12.15 The CMOS in Figures 12.13 and 12.14 are replaced by switches. W...Figure 12.16 A memory chip architecture consists of a matrix of unit cells (...Figure 12.17 The array of DRAM cells is addressed by a single input line (ho...Figure 12.18 The capacitor charges initially to the full voltage, VCC, but i...Figure 12.19 A ROM consists of CMOS arranged in such a way as to ensure that...Figure 12.20 Switch representation of the ROM when one of the word lines, WL...Figure 12.21 A PROM has fuses connecting the sources to the bit lines. These...Figure 12.22 The EPROM consists of a regular MOSFET with a completely isolat...Figure 12.23 Implementation of a 2 to 1 MUX using three NANDs and one NOT mo...
13 Chapter 13Figure 13.1 A simple photoconductor consists of a semiconductor with two con...Figure 13.2 Radiation shining on a reversed‐biased diode creates an electron...Figure 13.3 The PIN diode structure consist of a p‐ and an n‐region separate...Figure 13.4 Both MASERs and LASERs work with the idea that electrons that ar...Figure 13.5 In a coherent light (left) all the waves A, B, and C are exactly...Figure 13.6 The beam of light bounces inside the cavity with one fully refle...Figure 13.7 A ruby LASER in a reflective cavity surrounded by a light coil t...Figure 13.8 The internal voltage for a degenerate semiconductor diode is lar...Figure 13.9 On the left we have a highly doped pn‐junction. When we forward ...Figure 13.10 In a LASER semiconductor, the reflective properties of the tran...Figure 13.11 Some
