Reversible and DNA Computing. Hafiz M. H. Babu
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The cost of all 2
1.7 Delay
The delay of a logic circuit is the maximum number of gates in a path from any input line to any output line. The definition is based on two assumptions: (i) Each gate performs computation in one unit time and (ii) all inputs to the circuit are available before the computation begins.
Example 1.6
The delay of each 1
1.8 Power
Power of a gate is defined by the energy. Energy of a basic quantum gate is 142.3 meV. Quantum circuits can be implemented with the basic quantum gates and the number of quantum gates depends on the number of basic quantum gates needed to realize it. That means the total number of required quantum gates in the quantum representation of a reversible quantum circuit or gate. So, the power of a reversible gate can be defined as follows:Power = Number of quantum gates
Example 1.7
Figure 1.5 shows the quantum realization of the reversible HNG gate. From this figures, it is seen that the quantum realization of reversible HNG gate requires total six quantum gates. So, the power of the reversible HNG gate is (6
1.9 Area
The area of a reversible gate is defined by the feature size. This size varies according to the number of quantum gates. The size of the basic quantum gates ranges from 50–300 Å. The Angstrom (Å) is a unit equal to
Area = Number of quantum gates
Figure 1.5 The quantum representation of reversible HNG gate.
Example 1.8
Figure 1.5 shows the quantum realization of the reversible HNG gate. From this figures, it is seen that the quantum realization of reversible HNG gate requires total six quantum gates. So, the area of the reversible HNG gate is ((50
1.10 Hardware Complexity
The hardware complexity of a reversible logic circuit specifies the total number of Ex‐OR operations, NOT operations, and AND operations used in the circuit. Consequently, the hardware complexity can be determined using the following equation:
(1.10.1)
where
= Hardware complexity (total logical operations)
= A two input EX‐OR gate logical operation
= A two input AND gate logical operation
= A NOT gate logical operation
Example 1.9
Figure 1.6 shows the block diagram of a reversible Fredkin (FRG) gate. The figure describes that there is only one NOT operation, two EX‐OR operations, and four AND operations. So, the hardware complexity of the reversible FRG gate is
1.11 Quantum Gate Calculation Complexity
The quantum gate calculation complexity of the quantum representation of a reversible circuit specifies the total number of quantum gates (NOT gates, CNOT gates, and controlled‐V (controlled‐
(1.11.1)
where
= Quantum gate calculation complexity