Reversible and DNA Computing. Hafiz M. H. Babu

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      Table of Contents

      1  Cover

      2  About the Author

      3  Preface

      4  Acknowledgments

      5  Acronyms

      6  Introduction

      7  Part I: Reversible Circuits 1 Reversible Logic Synthesis 1.1 Reversible Logic 1.2 Reversible Function 1.3 Reversible Logic Gate 1.4 Garbage Outputs 1.5 Constant Inputs 1.6 Quantum Cost 1.7 Delay 1.8 Power 1.9 Area 1.10 Hardware Complexity 1.11 Quantum Gate Calculation Complexity 1.12 Fan‐Out 1.13 Self‐Reversible 1.14 Reversible Computation 1.15 Area 1.16 Design Constraints for Reversible Logic Circuits 1.17 Quantum Analysis of Different Reversible Logic Gates 1.18 Summary 2 Reversible Adder and Subtractor Circuits 2.1 Reversible Multi‐Operand n‐Digit Decimal Adder 2.2 Reversible BCD Adders 2.3 Reversible BCD Subtractor 2.4 Summary 3 Reversible Multiplier Circuit 3.1 Multiplication Using Booth's Recoding 3.2 Reversible Gates as Half Adders and Full Adders 3.3 Some Signed Reversible Multipliers 3.4 Design of Reversible Multiplier Circuit 3.5 Summary 4 Reversible Division Circuit 4.1 The Division Approaches 4.2 Components of Division Circuit 4.3 The Design of Reversible Division Circuit 4.4 Summary 5 Reversible Binary Comparator 5.1 Design of Reversible ‐Bit Comparator 5.2 Summary 6 Reversible Sequential Circuits 6.1 An Example of Design Methodology 6.2 The Design of Reversible Latches 6.3 The Design of Reversible Master–Slave Flip‐Flops 6.4 The Design of Reversible Latch and the Master–Slave Flip‐Flop with Asynchronous SET and RESET Capabilities 6.5 Summary 7 Reversible Counter, Decoder, and Encoder Circuits 7.1 Synthesis of Reversible Counter 7.2 Reversible Decoder 7.3 Summary 8 Reversible Barrel Shifter and Shift Register 8.1 Design Procedure of Reversible Bidirectional Barrel Shifter 8.2 Design Procedure of Reversible Shift Register 8.3 Summary 9 Reversible Multiplexer and Demultiplexer with Other Logical Operations 9.1 Reversible Logic Gates 9.2 Designs of Reversible Multiplexer and Demultiplexer with Other Logical Operations 9.3 Summary 10 Reversible Programmable Logic Devices 10.1 Reversible FPGA 10.2 Reversible PLA 10.3 Summary 11 Reversible RAM and Programmable ROM 11.1 Reversible RAM 11.2 Reversible PROM 11.3 Summary 12 Reversible Arithmetic

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