href="#ulink_310d70da-f8c1-5738-b2ba-c4a5b62ff8bd">25.11 Gene Pool Update
25.12 Summary
26 DNA‐Based Reversible Circuits
26.1 DNA‐Based Reversible Gates
26.2 DNA‐Based Reversible NOT Gate
26.3 DNA‐Based Reversible Ex‐OR Gate
26.4 DNA‐Based Reversible AND Gate
26.5 DNA‐Based Reversible OR Gate
26.6 DNA‐Based Reversible Toffoli Gate
26.7 Realization of Reversible DNA‐Based Composite Logic
26.8 Summary
27 Addition, Subtraction, and Comparator Using DNA
27.1 DNA‐Based Adder
27.2 DNA‐Based Addition/Subtraction Operations
27.3 DNA‐Based Comparator
27.4 Summary
28 Reversible Shift and Multiplication Using DNA
28.1 DNA‐Based Reversible Shifter Circuit
28.2 DNA‐Based Reversible Multiplication Operation
28.3 Summary
29 Reversible Multiplexer and ALU Using DNA
29.1 DNA‐Based Reversible Multiplexer
29.2 DNA‐Based Reversible Arithmetic Logic Unit
29.3 Summary
30 Reversible Flip‐Flop Using DNA
30.1 The Design of a DNA Fredkin Gate
30.2 Simulating the Fredkin Gate by Sticking System
30.3 Simulation of the Reversible D Latch Using DNA Fredkin Gate
30.4 DNA‐Based Biochemistry Technology
30.5 Summary
31 Applications of DNA Computing
31.1 Solving the Optimization and Scheduling Problems Like the Traveling Salesman Problem
31.2 Parallel Computing
31.3 Genetic Algorithm
31.4 Neural System
31.5 Fuzzy Logic Computation and Others
31.6 Lift Management System
31.7 DNA Chips
31.8 Swarm Intelligence
31.9 DNA and Cryptography Systems
31.10 Monstrous Memory Capacity
31.11 Low‐Power Dissipation
31.12 Summary
10 Conclusion
11 Copyright Permission of Third‐Party Materials
12 Bibliography
13 Index
List of Tables
1 Chapter 2Table 2.1 Reversibility of 4
2 Chapter 3Table 3.1 Radix‐4 Booth's Recoding.Table 3.2 Truth Table for Recoding Cell.
3 Chapter 4Table 4.1 Function Table for Reversible PIPO Left‐Shift Register.
4 Chapter 5Table 5.1 Truth Table of the BJS Gate.Table 5.2 Truth Table of the BJS Gate.Table 5.3 Truth Table of the 1‐Bit Binary Comparator.
5 Chapter 6Table 6.1 Modified Truth Table of the SR Latch
6 Chapter 7Table 7.1 Truth Table for the Reversible 2–to–4 DecoderTable 7.2 Truth Table for the Reversible 4–to–2 Encoder
7 Chapter 8Table 8.1 Truth Table of Reversible PIPO Shift RegisterTable 8.2 Function Table for Reversible Universal Shift Register
8 Chapter 9Table 9.1 Truth Table of the B‐I GateTable 9.2 Truth Table of the R‐II Gate
9 Chapter 10Table 10.1 The Products of Functions
10 Chapter 11Table 11.1 Truth Table of
11 Chapter 13Table 13.1 Reversibility of
12 Chapter 14Table 14.1 Truth Table of the Parity‐Preserving IG Gate.Table 14.2 Input‐Output Patterns of a Full Adder
13 Chapter 15Table 15.1 Truth Table of
14 Chapter 16Table 16.1 Truth Table of 4
