Implementation of SOLT calibration for network analyzer.Figure 4.36 GCPW for SOLT calibration fixture implementation.Figure 4.37 “Thru” calibration test fixture – top view.Figure 4.38 “Open” calibration test fixture.Figure 4.39 “Load” calibration test fixture.Figure 4.40 “Short” calibration test fixture.Figure 4.41 BFR92 bias simulation test setup.Figure 4.42 Biasing test fixture for BRF92.Figure 4.43 Network analyzer measurement setup of BRF 92.Figure 4.44 Quarter‐wave coplanar waveguide transmission line used for simul...Figure 4.45 Quarter‐wave short circuit simulation.Figure 4.46 Quarter‐wave open circuit simulation.Figure 4.47 S parameters of coplanar waveguide transmission line without stu...Figure 4.48 Quarter‐wave stub attached to input port.Figure 4.49 Quarter‐wave short circuit stub attached at input port.Figure 4.50 Quarter‐wave stub with capacitor attached at input port.Figure 4.51 Quarter‐wave stub attached to both input and output ports.Figure 4.52 Quarter‐wave short circuit stub attached to both input and outpu...Figure 4.53 Quarter‐wave stub with capacitor attached at both input and outp...Figure 4.54 Input return loss comparison (S 11); V CE = 10 V, I C = 5 mA.Figure 4.55 Output return loss comparison (S 22); V CE = 10 V, I C = 5 mA.Figure 4.56 Reverse isolation comparison (S 12); V CE = 10 V, I C = 5 mA.Figure 4.57 Forward gain comparison (S 21); V CE = 10 V, I C = 5 mA.Figure 4.58 Zero biased small signal two‐port network at low frequencies.Figure 4.59 Problem 4.1.Figure 4.60 Problem 4.2.Figure 4.61 Problem 4.3.Figure 4.62 Problem 4.4.Figure 4.63 Problem 4.5.Figure 4.64 Problem 4.6.Figure 4.65 Problem 4.7.Figure 4.66 Problem 4.9.Figure 4.67 Problem 4.10.Figure 4.68 TO‐247 MOSFET package measurement setup.5 Chapter 5Figure 5.1 Implementation of matching network between t‐line and load.Figure 5.2 Eight possible L matching network sections.Figure 5.3 Generic L matching network sections to represent eight L sections...Figure 5.4 ZY Smith chart as a graphical tool for impedance matching.Figure 5.5 Smith chart solution for Example 5.2.Figure 5.6 Smith chart solution for Example 5.3.Figure 5.7 Input impedance using quarter‐wave transformer.Figure 5.8 Illustration of Example 5.4.Figure 5.9 Single stub matching: (a) parallel; (b) series.Figure 5.10 Illustration of double stub tuner circuit.Figure 5.11 Smith chart solution for double tuner for Example 5.5.Figure 5.12 Matching network between load and transmission line.Figure 5.13 Generic two L matching networks between source and load impedanc...Figure 5.14 Number of possible L matching networks to match source and load ...Figure 5.15 Possible L matching networks to match source and load impedance....Figure 5.16 Node quality factor illustration.Figure 5.17 Q‐factor Smith chart.Figure 5.18 Two possible L‐type matching networks.Figure 5.19 Smith chart solution for Example 5.7.Figure 5.20 General topologies for (a) T network and (b) PI network.Figure 5.21 Dimensions of single stub tuner.Figure 5.22 Ansoft simulation of single sub tuner.Figure 5.23 TRL calculator for electrical length in Ansoft Simulator.Figure 5.24 Single stub tuner prototype.Figure 5.25 Prototype sections: (a) load; (b) shorted stub.Figure 5.26 Measured S11 for the prototype.Figure 5.27 Illustration of the measured tuning frequency.Figure 5.28 Illustration of the matching network for Design Example 5.2.Figure 5.29 Representation of microstrip line.Figure 5.30 The simulated matching network with open stub.Figure 5.31 ADS simulation results with open stub.Figure 5.32 The simulated matching network with short stub.Figure 5.33 ADS simulation results with short stub.Figure 5.34 Microstrip line implementation with open stub.Figure 5.35 ADS simulation results of microstrip line implementation with op...Figure 5.36 Microstrip line implementation with short stub.Figure 5.37 ADS simulation results of microstrip line implementation with sh...Figure 5.38 The layout to be used for EM simulation.Figure 5.39 Microstrip layout for open stub matching network.Figure 5.40 Microstrip layout for short stub matching network.Figure 5.41 EM simulation results of the matching network.Figure 5.42 Co‐simulation circuit for open stub.Figure 5.43 Co‐simulation circuit for short stub.Figure 5.44 Simulation results for the final layout for co‐simulated open st...Figure 5.45 Simulation results for the final layout for co‐simulated short s...Figure 5.46 Problem 5.6.Figure 5.47 Problem 5.7.Figure 5.48 Problem 5.8.Figure 5.49 Problem 5.9.Figure 5.50 Amplifier impedance transformer design.Figure 5.51 Design Challenge 5.1.
6 Chapter 6Figure 6.1 Ideal resonant network response.Figure 6.2 Parallel resonant circuit.Figure 6.3 Parallel resonant network response for an underdamped case.Figure 6.4 Parallel resonant network response for an overdamped case.Figure 6.5 Parallel resonant circuit with a source current.Figure 6.6 Pole‐zero diagram for complex conjugate roots.Figure 6.7 Parallel resonant circuit transfer function characteristics.Figure 6.8 Attenuation profile.Figure 6.9 (a) Series resonant network. (b) Series resonant network response...Figure 6.10 Series resonant network with source voltage.Figure 6.11 Series resonant circuit transfer function characteristics.Figure 6.12 High frequency representation of (a) inductor and (b) capacitor....Figure 6.13 Equivalent series circuit.Figure 6.14 Equivalent parallel circuit.Figure 6.15 LC resonant network with ideal components and source.Figure 6.16 The frequency characteristics of an LC network with source.Figure 6.17 Addition of loss to parallel LC network.Figure 6.18 Attenuation profile of an LC network with loss resistor.Figure 6.19 Quality factor of an LC network with a loss resistor.Figure 6.20 Quality factor of an LC network for different source resistance ...Figure 6.21 Attenuation profile of an LC network for different source resist...Figure 6.22 Loaded LC resonant circuit.Figure 6.23 Equivalent loaded LC resonant circuit at resonance.Figure 6.24 RC series to parallel RC network transformation.Figure 6.25 Series to parallel conversion.Figure 6.26 Attenuation profile for parallel resonant network.Figure 6.27 LC series to parallel RL network transformation.Figure 6.28 LC parallel network using L with series loss transformation.Figure 6.29 LC parallel network using C with series loss transformation.Figure 6.30 Inductively coupled resonators.Figure 6.31 Inductively coupled resonators (a) below resonance and (b) above...Figure 6.32 Capacitively coupled resonators.Figure 6.33 Inductively coupled resonators (a) below resonance and (b) above...Figure 6.34 Inductively coupled resonators.Figure 6.35 Capacitively coupled resonators.Figure 6.36 (a) Attenuation profile for capacitively coupled resonators. (b)...Figure 6.37 LC impedance transformer for inductive load.Figure 6.38 LC impedance transformer for capacitive load.Figure 6.39 Amplifier output load line circuit.Figure 6.40 Capacitive voltage divider.Figure 6.41 Capacitive voltage divider with load resistor.Figure 6.42 Capacitive voltage divider with parallel to series transformatio...Figure 6.43 Tapped equivalent circuit.Figure 6.44 Equivalent tapped‐C circuit representation using transformer.Figure 6.45 Parallel resonant circuit with tapped‐C approach.Figure 6.46 Tapped C and L implementation for amplifiers.Figure 6.47 Attenuation profile for Example 6.5.Figure 6.48 Tapped‐L impedance transformer.Figure 6.49 Tapped‐L impedance transformer with parallel to series transform...Figure 6.50 Tapped‐L equivalent circuit.Figure 6.51 Input network transformation for tapped C transformer.Figure 6.52 Output network transformation for tapped L transformer.Figure 6.53 MATLAB GUI to design tapped C and tapped L impedance transformer...Figure 6.54 Capacitively coupled amplifier circuit.Figure 6.55 Problem 6.3.Figure 6.56 Problem 6.4.Figure 6.57 Problem 6.5.Figure 6.58 Problem 6.6.Figure 6.59 Problem 6.7.Figure 6.60 Problem 6.8.Figure 6.61 Problem 6.9.Figure 6.62 Problem 6.10.
7 Chapter 7Figure 7.1 Directional coupler as a four‐port device.Figure 7.2 Symmetrical two‐line microstrip directional coupler.Figure 7.3 Coupled lines mode representation: (a) even mode; (b) odd mode.Figure 7.4 Three‐line symmetrical microstrip coupler.Figure 7.5 Generation of three‐line coupler from the design parameters of a ...Figure 7.6 Removal of the main line in a three‐line coupler for formulation ...Figure 7.7 MATLAB GUI for a two‐line microstrip directional coupler.Figure 7.8 Simulated microstrip two‐line directional coupler.Figure 7.9 Simulated results for the coupling level for a two‐line symmetric...Figure 7.10 Two‐line multilayer directional coupler.Figure 7.11 Three‐line multilayer directional coupler.Figure 7.12 Four‐port transformer directional coupler.Figure 7.13 Four‐port transformer directional coupler for circuit analysis....Figure 7.14 Six‐port transformer directional coupler.Figure 7.15 Forward mode analysis of six‐port coupler when V 2 = V 3 = V 4 = V 5 Figure
