Frame 1.18
The completed state diagram is shown in Figure 1.20.
Figure 1.20 Complete state diagram for the 101 pattern generator.
The Boolean equation for P in this diagram is P = s1 + s3. However, we could make the P output a Mealy output that is only equal to 1 when in states s1 and s3, and only if the clock pulse is equal to 1.
Then, P = s1·clk + s3·clk since P must be high in both states s1 and s3, but only when the clock input is high.
Try writing an account of how this FSM works in your own words. If you get stuck, just re‐read Frames 1.16and 1.17again to refresh your memory.
Now try modifying the state diagram to make it produce a 101 sequence of clock pulses (in the same manner as shown in Frames 1.17and 1.18).
Also, arrange for the P output pulse in state s3 to be conditional on a new input called x. If x = 0, the FSM should produce the output sequence 100 at P. If x = 1, the output sequence at P should be 101.
The reader may have noticed that the state diagram does not need to use slings. This is because slings are not really necessary with modern state diagrams. In fact, they are really only included for cosmetic reasons, to improve the readability of the design. From now on, only use slings where they improve the readability of the state diagram.
1 When you have done this, draw your state diagram and then turn to Frame 1.19.
Modify the state diagram to make it produce a 101 sequence of clock pulses (in the same manner as shown in Frames 1.15and 1.16. Also, arrange for the P output pulse in state s3 to be conditional on a new input called x. If x = 0, the FSM should produce the output sequence 100 at P. If x = 1, the output sequence at P should be 101.
The modified state diagram is shown in Figure 1.21.
Figure 1.21 Modified state diagram with output P as a Mealy output.
In Figure 1.21, the clock is used as a qualifier in states s1 and s3 so that the output P is only logic 1 in these two states. However, state s3 has an additional qualifier x, so in s3 P = 1 only when in s3 and then only if input signal x is true in s3.
Then in state s3, the output P will only obtain a clock pulse if the x input happens to be logic 1.
You can see that if x = 0 then, when the input s is raised to logic 1, the FSM will produce the sequence 100 at output P. Therefore, P = s1 + s3·x. If x = 1 then, when s is raised to logic 1, the FSM will produce a 101 sequence at the output P.
This FSM is an example of a Mealy FSM since the output P is a function of both the state and the inputs clock and x, i.e. both clock and x are fed forward to the output decoding logic.
The reader could easily modify the FSM so that the 100 sequence at P was produced if x = 1, and the 101 sequence produced if x = 0. Therefore, now:
Produce the Boolean equation for P in state s3 that would satisfy this requirement.
Then assign a unit distance code to the state diagram; see Frames 1.12and 1.13.
Finally, when you have done that, try producing a timing diagram of the modified FSM.
When you’ve finished, turn to Frame 1.20.
Produce the Boolean equation for P in state s3 that would satisfy this requirement.
The Boolean equation for P which will produce a 101 sequence when x = 0 is:
P = s3·/x.
Note you do not need to indicate the clk, as it is assumed. Also note that in this case qualifying with NOT x (/x), rather than with x, as in Figure 1.22.
Figure 1.22 State diagram with Mealy P output in s3.
It is very likely that you came up with a different set of values for the secondary state assignments to those obtained. This is fine since there is no real preferred set of assignments, apart from trying to obtain a unit distance coding (ABC values not shown at this stage).
Try re‐drawing the state diagram with the dummy state and modified coding.
Note: care should be taken where you place the dummy state. If you added a dummy state between states s1 and s2, for example, it would alter the P output sequence so that, instead of producing, say, 101, the sequence 1001 would be produced.
A safe place to add a dummy state would be between states s3 and s4, or between states s4 and s0 since they are outside the ‘critical P’ sequence generating in this part of the
