2.9 A line stretcher used for match measurements.Figure 2.10 Measurement of long line indicating power source‐match using an ...Figure 2.11 Measured source output impedance away from the source frequency:...Figure 2.12 Schematic of a directional bridge.Figure 2.13 Adding a transformer between the source and the bridge.Figure 2.14 Replacing bridge elements with RF ports.Figure 2.15 A bridge redrawn to show the coupling factor.Figure 2.16 An example of a directional bridge from the HP 8753B.Figure 2.17 RF performance of a directional bridge.Figure 2.18 A directional coupler used in VNAs.Figure 2.19 Block diagram of a 1+gamma reflectometer.Figure 2.20 Smith chart showing reflections of a 1+gamma bridge with an open...Figure 2.21 Schematic of a sampler.Figure 2.22 Spurs from a source crossing a harmonic of the VCO.Figure 2.23 Digital IF block diagram.Figure 2.24 A satellite multiplexer with many outputs.Figure 2.25 Simple switch tree test set.Figure 2.26 Full cross‐bar switching test set.Figure 2.27 Extension test set block diagram.Figure 2.28 12‐port system using a 4‐port VNA and two extension test sets....Figure 2.29 A 50‐port VNA system comprised of 6‐port and 2‐port modules.Figure 2.30 mm‐Wave Head block diagram with broadband capability.Figure 2.31 A 4‐port, 900 Hz to 130 GHz VNA system using mm‐wave extenders....Figure 2.32 Effects of noise floor on an S21 measurement.Figure 2.33 VNA source signal where phase noise rises above noise floor.Figure 2.34 Example of trace noise decreasing with increased signal level, u...Figure 2.35 Impedance and admittance Smith charts.Figure 2.36 Smith chart (right) and admittance chart (left) with wrapped pha...Figure 2.37 An impedance value rotated by 180° 50 Ω line.Figure 2.38 25 Ω termination proceeded by half‐wavelength segments of 12.5, ...Figure 2.39 Concatenation of two devices.Figure 2.40 Y and Z conversion circuits.3 Chapter 3Figure 3.1 Signal flow diagram for a forward and reverse measurements of a D...Figure 3.2 Signal flow diagram with source and receiver errors included.Figure 3.3 8‐term error model, with four measured waves.Figure 3.4 Determining the error terms graphically for open/short/load respo...Figure 3.5 The correct re‐measurement of an open and short after calibration...Figure 3.6 Model for an open circuit.Figure 3.7 Physical construction of (a) female open, (b) male open with exte...Figure 3.8 Variations in the open reflection coefficient due to radiation fo...Figure 3.9 Model for a short standard.Figure 3.10 Short circuit standards (a) male test port, (b) female test port...Figure 3.11 Load elements (a) male test port, (b) female test port.Figure 3.12 (a) Typical model for a load standard, (b) model for a load show...Figure 3.13 Representation of a sliding load.Figure 3.14 Smith chart measurement of a sliding load at a single frequency,...Figure 3.15 Error due to ignoring the length of a non‐insertable Thru, compa...Figure 3.16 Using UT cal to provide a 90° on‐wave calibration.Figure 3.17 Ecal modules are available in a variety of port configurations, ...Figure 3.18 Measurement of the internal standards on an Ecal™.Figure 3.19 Custom multiport calibration test set including Ecal, noise figu...Figure 3.20 Signal flow diagram during source power calibration.Figure 3.21 Variation in a1 due to mismatch on port 1.Figure 3.22 Results from a linearity error measurement for −25 dB (upper) an...Figure 3.23 Block diagram for characterizing incident power mismatch.Figure 3.24 Ripple in incident power (a1_a) and measured source power (a1_s)...Figure 3.25 Ripple in the actual incident power (upper) when the ALC referen...Figure 3.26 Power measurement of an amplifier after a receiver response cali...Figure 3.27 Setup for the Cal All function.Figure 3.28 Dialog for setting the master channel power and attenuator value...Figure 3.29 Cal All Mechanical Devices dialog.Figure 3.30 Cal All creates a master cal with only unique frequency points....Figure 3.31 Using multiple Thrus to link ports.Figure 3.32 Multiport TVAC test setup with CalPods in a the chamber.Figure 3.33 (Upper) After flexing the test cable, (Lower) after re‐correctio...Figure 3.34 Dialog for selecting wave correction and devolving ports.Figure 3.35 (Upper) Measurement of an airline with a response calibration an...Figure 3.36 Using an external attenuator to reduce power to the VNA port 2....Figure 3.37 Measurement of an airline with Enhanced Response Calibration, wi...Figure 3.38 Ripple envelope of the calibration load at the end of an airline...Figure 3.39 Determining directivity with time‐domain gating.Figure 3.40 Ripples from an open and short at the end of an airline.Figure 3.41 The computed residual source‐match shown in the lower plot.Figure 3.42 Measurement of a test port load match, upper is with a good cali...Figure 3.43 Two examples of S21 uncertainty with different coverage factors....Figure 3.44 Uncertainty depends upon the Calkit quality.Figure 3.45 Uncertainty changes with DUT loss.Figure 3.46 Phase error as a result of an error signal.Figure 3.47 A good dog and a good cable: how long will they stay good?Figure 3.48 Noise and dynamic accuracy error versus drive.Figure 3.49 (upper) Error in S11 changing the attenuator difference for 5 an...Figure 3.50 Attenuator offset applied as a de‐embedding after the attenuator...Figure 3.51 Noise added in a signal trace vs. source power.Figure 3.52 Circular interpolation of the load match term.Figure 3.53 Interpolation results with various point spacing.
4 Chapter 4Figure 4.1 Cosine of frequency 8.5 Hz (left), FFT of the waveform in the lef...Figure 4.2 Analytically derived impulse reflection response versus VNA time‐...Figure 4.3 Sinc‐squared frequency response continuous and sampled with a sam...Figure 4.4 One‐pole filter frequency response with and without truncation.Figure 4.5 Windows for Beta factors 0, 3, and 6 (upper); windows applied to ...Figure 4.6 VNA unit step response comprised of a periodic portion (which is ...Figure 4.7 Convolution of the frequency gate response.Figure 4.8 Time gates at three center times (upper); time response of gated ...Figure 4.9 Model of concatenated lines of different impedances (upper), step...Figure 4.10 Model of 2 capacitive discontinuities (upper), step response of ...Figure 4.11 S 11 response of two capacitive discontinuities (light gray) and ...Figure 4.12 S 11 of two capacitive discontinuities (light gray) not gated, S 1...Figure 4.13 Circuit with 2 capacitive discontinuities, and an offset impedan...Figure 4.14 Time gated response of the first discontinuity (thick gray, “1st...Figure 4.15 Eye diagram example with key attributes identified.Figure 4.16 Enhanced TDR application on a VNA.Figure 4.17 Eye‐diagram on a VNA‐based time‐domain transmission test.
